BJTs : Transistor in equilibrium (no external bias). Transistor with external bias, Transistor Action. Efficiency Factors. Common Base, Common Emitter, Common Collector Configurations, I-V Characteristics; Bias and Bias Stability. Various biasing Schemes/circuits and Analysis FETs: Junction field effect transistor (JFET), MOSFETs :Depletion MOSFET, Enhancement MOSFET; Biasing of MOSFETs.

Basics of LC & RC oscillatory circuit, frequency stability, Barkhausen criterion, RC oscillators: Phase shift oscillator, Wien bridge oscillator, LC oscillators: Hartley oscillator, Colpitt’s oscillator

MINIMIZATION TECHNIQUES AND LOGIC GATES: Boolean postulates and laws - De-Morgan's Theorem -Principle of Duality - Boolean expression - Minimization of Boolean expressions -- Minterm Maxterm - Sum of Products (SOP) - Product of Sums (POS) - Karnaugh map Minimization - Don't care conditions. Tabulation method. Logic Gates: AND, OR, NOT, NAND, NOR, Exclusive-OR and Exclusive-NOR Implementations of Logic Functions using gates, NAND-NOR implementations

Design procedure - Half adder - Full Adder - Half subtractor - Full subtractor - Parallel binary adder, parallel binary Subtractor - Fast Adder - Carry Look Ahead adder - Serial Adder/Subtractor - BCD adder - Binary Multiplier -Multiplexer/ Demultiplexer - decoder - encoder - parity checker - parity generators - code converters - Magnitude Comparator.

Latches, Design thinking approach of Edge triggered Flip flops SR, JK, T, D and Master slave - Characteristic table and equation, Application table, Synchronous counters, Design of synchronous counters, up/down counter, Decade counters.