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Dept : CST

Sem : 3

Regul : 2019

Faculty : Ms.K.Kalaivani

phone : 9342429560

E-mail : kalaivani.k.csd@snsce.ac.in

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Lecture Notes

UNIT 1:

Basic structure of computer

CASE STUDY RISC and CISC architecture

Assembly language

Addressing modes

Instruction and Instruction sequencing

Memory operations

Memory locations and addresses

Preprocessor

Operational concepts

Buss structures

UNIT 2:

Addition and Subtraction of signed numbers

Design of fast address

Fast multiplication

Multiplication of position numbers

Multiplication of signed numers

Integer divison

Floating point numbers and operations

UNIT 3:

INFLUENCE ON INSTRUCTION SETS

FUNDAMENTAL CONCEPT

INSTRUCTION

MULTIPLE BUS ORGINIZATION

HARDWIRED CONTROL

MICROPROGRAMMED CONTROL

PIPELINING BASIC CONCEPT

DATA HAZARDS

INSTRUCTION HAZARDS

DATA PATH AND CONTROL CONSIDERATION

UNIT 4:

PERFORMANCE CONSIDERATION

REQUIREMENTS OF MEMORY MANAGEMENT

SECONDARY STORAGE

UNIT 5:

IP/OP ORGINIZATION

DIRECT MEMORY ACCESS

BUSES

CONCLUDING REMARKS

INSTRUCTION LEVEL PARALLELISM

INTERFACE CIRCUITS

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