Subject Details
Dept     : CSE
Sem      : 3
Regul    : 2021
Faculty : Mr.R.Girish
phone  : 8921350672
E-mail  : snscecs88
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Lecture Notes

UNIT 1:
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Case study : RISC and CISC Architecture.
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Addressing modes – Assembly language
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Instruction and Instruction sequencing
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Basic operational concepts
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BASIC STRUCTURE OF COMPUTER
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Bus Structures – Performance – Memory locations and addresses
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Memory operations
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Case study : RISC and CISC Architecture.
UNIT 2:
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Addition and subtraction of signed numbers
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Signed operand multiplication
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multiplication – Integer division
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Signed operand multiplication
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Signed operand multiplication
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Signed operand multiplication
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Signed operand multiplication
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Signed operand multiplication
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Signed operand multiplication
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Signed operand multiplication
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Signed operand multiplication
UNIT 3:
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Hardwired control
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PROCESSOR AND PIPELINING
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PROCESSOR AND PIPELINING
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Fundamental concepts – Execution of a complete instruction
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Fundamental concepts – Execution of a complete instruction
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Hardwired control
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Micro programmed control – Pipelining
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Basic concepts – Data hazards
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Instruction hazards – Influence on Instruction sets
UNIT 4:
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MEMORY SYSTEM
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MEMORY SYSTEM
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Basic concepts of Semiconductor RAMs - ROMs – Speed, Size and Cost
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Basic concepts of Semiconductor RAMs - ROMs – Speed, Size and Cost
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Cache memories – Performance consideration
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Virtual memory – Memory Management requirements
UNIT 5:
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I/O ORGANIZATION AND PARALLELISM
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Accessing I/O devices – Interrupts – Direct Memory Access
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Buses–Interface circuits – Standard I/O Interfaces (PCI, SCSI, USB
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Instruction Level Parallelism
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Concepts and Challenge
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ntroduction to multicore processor – Graphics Processing Unit