Lecture Notes || SNS Courseware

Subject Details

Dept : ECE

Sem : 5

Regul : 2019

Faculty : T.G.Ramabharathi

phone : NIL

E-mail : rbharathi.tg.ece@snsce.ac.in

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Lecture Notes

UNIT 1:

DC characteristics

CMOS inverter

Non-ideal IV effects

MOS transistor theory-IV characteristics

twin-tub process

n-well process

CMOS fabrication â€“ p-well process

Stick diagram, Layout diagrams.

UNIT 2:

Pass transistor Logic

Power dissipation

Transmission gates

Domino Logic

dynamic CMOS design

static CMOS design

Pseudo NMOS logic

Examples of Combinational Logic Design

UNIT 3:

Static Latches

Synchronous and Asynchronous design.

Static Registers

clock strategie

Timing issues

UNIT 4:

Need for testing

Chip and system level design techniques

System level test techniques.

Design strategies for test

Manufacturing test principles

UNIT 5:

Basic concepts- identifiers- gate primitives

Test benches

gate delays, operators, timing controls

Design hierarchies

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